libqbe/arm64/targ.c
Quentin Carbonneaux a9a70e30a8 add new target-specific abi0 pass
The general idea is to give abis a
chance to talk before we've done all
the optimizations. Currently, all
targets eliminate {par,arg,ret}{sb,ub,...}
during this pass. The forthcoming
arm64_apple will, however, insert
proper extensions during abi0.

Moving forward abis can, for example,
lower small-aggregates passing there
so that memory optimizations can
interact better with function calls.
2022-10-03 10:41:03 +02:00

55 lines
1 KiB
C

#include "all.h"
int arm64_rsave[] = {
R0, R1, R2, R3, R4, R5, R6, R7,
R8, R9, R10, R11, R12, R13, R14, R15,
IP0, IP1, R18, LR,
V0, V1, V2, V3, V4, V5, V6, V7,
V16, V17, V18, V19, V20, V21, V22, V23,
V24, V25, V26, V27, V28, V29, V30,
-1
};
int arm64_rclob[] = {
R19, R20, R21, R22, R23, R24, R25, R26,
R27, R28,
V8, V9, V10, V11, V12, V13, V14, V15,
-1
};
#define RGLOB (BIT(FP) | BIT(SP) | BIT(R18))
static int
arm64_memargs(int op)
{
(void)op;
return 0;
}
Target T_arm64 = {
.name = "arm64",
.gpr0 = R0,
.ngpr = NGPR,
.fpr0 = V0,
.nfpr = NFPR,
.rglob = RGLOB,
.nrglob = 3,
.rsave = arm64_rsave,
.nrsave = {NGPS, NFPS},
.retregs = arm64_retregs,
.argregs = arm64_argregs,
.memargs = arm64_memargs,
.abi0 = elimsb,
.abi1 = arm64_abi,
.isel = arm64_isel,
.emitfn = arm64_emitfn,
.emitfin = elf_emitfin,
.asloc = ".L",
};
MAKESURE(globals_are_not_arguments,
(RGLOB & (BIT(R8+1) - 1)) == 0
);
MAKESURE(arrays_size_ok,
sizeof arm64_rsave == (NGPS+NFPS+1) * sizeof(int) &&
sizeof arm64_rclob == (NCLR+1) * sizeof(int)
);