Commit graph

371 commits

Author SHA1 Message Date
Quentin Carbonneaux
e68aac2cef use loadw in cprime.ssa 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
0a84de5e53 finish isel adressing modes and clear the code 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
d95c8f296b fix several bugs on Blk.gen in liveness 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
27bcd5a3c6 fillphi() now comes before filllive() 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
d43ebe8f58 break phi-classes following interferences 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
614130e431 remove liveness heuristic in fillphi() 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
dfede22dcd new regalloc heuristic for phis
At the beginning of each block look at the phi nodes that
have some arguments already allocated.  If the some
arguments from blocks with high execution frequency are
all assigned 'r', reset the the hint for the phi node to
this 'r'.  Combined with the following heuristic, this
can save some copies at the end of the destination blocks.
2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
56203de6df wip on regalloc new heuristics
I thought that many parallel copies generated
can be avoided if temporaries are in their hint
register at the beginning of blocks with multiple
predecessors.

To get more benefit, I suspect that we could
use a copy-propagating peephole pass.
2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
65c35372fd setup hints for function arguments 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
32ad5e368a prioritize reg. allocation of some temporaries 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
05f120431d this test optimization is sometimes incorrect 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
a9dc36e0eb change extension in sum example 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
d272f0896b simplify constant handling in amatch() 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
fb1c02657b fix bug in constants addition 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
9c29630dbf small fix in memory refs emission 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
10ef1c132b store constant addresses in Mem.offset 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
486915f501 print memory references in IR dumps 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
d1f048bc9c don't share mems containing temporaries
This can cause trouble in register allocation when
these temporaries get replaced by registers.  On
the other hand, offsetted slots and constants
can safely be shared.
2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
47a34dbd51 turn sum.ssa more C style 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
6d264a2594 port rega.c to work with RAMem 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
aa5682480c oops, another bug in sum.ssa 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
ab7a5c277a add support for RAMem in emit 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
039f9de5c5 port spill.c to work with RAMem 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
7ed3303036 mention addressing modes in isel main comment 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
e0d7beda69 fix typo bug in liveness 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
04b66d38db start integrating RAMem references 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
b33febc25c prepare for using memory refs 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
82d79017ff fix test for load folding 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
e205856bc6 stick scales close to their instruction 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
326bf160f4 fix minor bug in sum.ssa 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
6e0c394047 add a test for addressing mode optimization 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
97db80da31 start work on fusing loads in arithmetic 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
475e90a371 first attempt at address matching 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
525d4db4ea new function to add constants 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
8ef0e2d027 cosmetics on address numbering code 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
b44f46fafc store addressability infos in a struct 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
639142f44c do not give an addressability number to scales 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
5e43482c11 store child matchings in the addressing table 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
4185168edc missed a few cases in the tree automaton 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
fa3f7b53fa make the echo test return 0 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
30f47d6ec1 fix bug in pretty printer 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
bb5f95c192 start adress mode recognition 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
4bce97b16b rename spill field in Tmp to slot 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
a7e7d73a7e use new loadl instruction in echo 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
b284721c8a emit code for extensions, move slots into RAlt 2015-10-30 13:20:42 -04:00
Quentin Carbonneaux
7c6fadc6ba uniformize sign extension and mem loads 2015-10-19 17:28:21 -04:00
Quentin Carbonneaux
96fab80240 rename valloc and balloc
valloc is actually a POSIX function that
prevents compilation on some systems.
2015-10-13 17:20:44 -04:00
Quentin Carbonneaux
d5afba7909 change end comment for functions 2015-10-08 23:03:24 -04:00
Quentin Carbonneaux
a07c6e10f5 fix minor bug in rega
The detection of empty permutations was incorrect
since the changes made to the vector routines.
2015-10-08 23:02:19 -04:00
Quentin Carbonneaux
2642ff022c improve debug output 2015-10-08 22:05:30 -04:00