Commit graph

59 commits

Author SHA1 Message Date
Quentin Carbonneaux
1dd22a9b47 function params must be unique 2024-04-27 10:52:03 +02:00
Quentin Carbonneaux
1f69842fb8 fix link in doc 2024-01-03 12:12:41 +01:00
Chenguang Wang
24d68e841f Add missing documentation for union types and VAL.
See previous discussion here[1]. It's unclear to me how to preview HTML page
generated from the .txt file, though.

[1]: https://lists.sr.ht/~mpu/qbe/%3C87cz1jq26k.fsf%40greenfork.me%3E
2024-01-02 11:51:34 +01:00
Quentin Carbonneaux
f1b21d145b reorder some sections in doc 2023-01-09 14:05:06 +01:00
Quentin Carbonneaux
c5cd65261e update documentation 2022-12-16 16:56:40 +01:00
Simon Heath
790aedb8fe Fix minor typos in IL doc 2022-06-29 22:55:16 +02:00
Quentin Carbonneaux
ee6c272416 tighten function definition spec 2022-05-12 09:24:23 +02:00
Quentin Carbonneaux
2c8697696d use an alias for \n in the il spec 2022-05-12 09:18:37 +02:00
Quentin Carbonneaux
fb742ec0e4 document spacing in il reference 2022-05-11 10:33:32 +02:00
lincoln auster [they/them]
3d294346ab doc: export function main in hello world example
This enables the example to be compiled and run as-is, without any
additional modification.
2022-03-07 15:34:28 +01:00
Scott Graham
ddd101df66 doc: Add missing neg entry to index 2022-02-27 11:27:55 +01:00
Paul Ouellette
e04a2cd281 doc: minor fixes 2022-02-24 13:11:20 +01:00
Michael Forney
4e93eeaa3b add rv64 backend
It is mostly complete, but still has a few ABI bugs when passing
floats in structs, or when structs are passed partly in register,
and partly on stack.
2022-02-17 22:43:12 +01:00
Quentin Carbonneaux
e092473be1 document the automatic use of bss 2022-02-11 09:14:17 +01:00
Paul Ouellette
9fc0394d7e doc: fix name of export linkage flag 2022-02-11 08:45:32 +01:00
Quentin Carbonneaux
2ca6fb25a2 shared linkage logic for func/data 2022-02-02 21:09:37 +01:00
Bor Grošelj Simić
3964574a83 implement float -> unsigned casts
amd64 lacks instruction for this so it has to be implemented with
float -> signed casts. The approach is borrowed from llvm.
2022-01-28 09:24:15 +01:00
Bor Grošelj Simić
74d022f975 implement unsigned -> float casts
amd64 lacks an instruction for this so it has to be implemented with
signed -> float casts:
 - Word casting is done by zero-extending the word to a long and then doing
   a regular signed cast.
 - Long casting is done by dividing by two with correct rounding if the
   highest bit is set and casting that to float, then adding
   1 to mantissa with integer addition
2022-01-28 09:24:15 +01:00
Eyal Sawady
e91d121581 Add a negation instruction
Necessary for floating-point negation, because
`%result = sub 0, %operand` doesn't give the correct sign for 0/-0.
2022-01-23 11:43:59 +01:00
Quentin Carbonneaux
fcdef10dae make variadic args explicit
Some abis, like the riscv one, treat
arguments differently depending on
whether they are variadic or not.
To prepare for the upcomming riscv
target, we change the variadic call
syntax and give meaning to the
location of the '...' marker.

  # new syntax
  %ret =w call $f(w %regular, ..., w %variadic)

By nature of their abis, the change
is backwards compatible for existing
targets.
2021-10-22 23:53:25 +02:00
Quentin Carbonneaux
5e5e301e86 fix a typo in call's BNF
Thanks to Jakob for pointing this out.
2020-08-06 10:34:42 +02:00
Michael Forney
cf9f2e8ef7 doc: Aggregate types can be nested 2019-02-21 09:36:35 +01:00
Michael Forney
fcd55bb441 doc: Include align in data BNF 2019-02-21 09:27:05 +01:00
Quentin Rameau
51c46ba691 Small corrections in documentation 2017-04-26 09:35:05 -04:00
Quentin Carbonneaux
0d77e262a6 documentation update 2017-04-18 10:02:14 -04:00
Quentin Carbonneaux
6fd78ec78f nits in the documentation 2017-04-08 22:10:02 -04:00
Quentin Carbonneaux
a940cc808e turn the instruction index into a list 2017-02-22 12:30:44 -05:00
Quentin Rameau
835b2b4910 create an index for the instructions in the IL doc 2017-02-03 09:26:43 -05:00
Quentin Rameau
cec21e6540 create an instruction index for the IL doc 2017-01-20 11:26:37 -05:00
Quentin Rameau
9fbb276e37 change 'b' and 'h' ordering in IL doc 2017-01-20 11:25:46 -05:00
Quentin Carbonneaux
6ed62fe945 doc nits 2016-11-09 22:34:05 -05:00
Quentin Carbonneaux
97d33be074 update documentation with new fp conversions 2016-04-22 15:16:47 -04:00
Quentin Carbonneaux
1c96401f0c oops fix wrong instruction names in doc 2016-04-21 14:27:15 -04:00
Quentin Carbonneaux
84bb28c042 support calls with no return
I thought it would be harder (and maybe it is).
My fear was that a call must be always followed by
a parallel move from machine registers (this is an
assumption in both spill and rega).  This however
remains true, because the ABI code generates a
dummy "copy RAX" by accident!
2016-04-20 12:53:42 -04:00
Quentin Carbonneaux
fbbd2252aa typos in il.txt, thanks Robert Ransom 2016-03-29 17:35:37 -04:00
Quentin Carbonneaux
8ac4af4875 document new shift operations 2016-03-16 11:40:47 -04:00
Quentin Carbonneaux
1b27215003 document exts and truncd 2016-03-15 14:07:13 -04:00
Quentin Carbonneaux
f691d4fb6b doc is now complete 2016-03-15 13:50:34 -04:00
Quentin Carbonneaux
714c472055 massage Instructions section 2016-03-15 10:44:05 -04:00
Quentin Carbonneaux
15aa877cae finish the Memory section 2016-03-14 20:52:34 -04:00
Quentin Carbonneaux
69e051ae4e compactify some instruction lists 2016-03-14 17:07:47 -04:00
Quentin Carbonneaux
68c3b7ba51 start doc on memory instructions 2016-03-14 16:49:32 -04:00
Quentin Carbonneaux
433ab81939 start description of instructions 2016-03-14 16:30:53 -04:00
Quentin Carbonneaux
ffb9e98152 rework the types section 2016-03-13 09:44:46 -04:00
Quentin Carbonneaux
e76a6f7339 less redundancy in il.html 2016-03-13 09:28:39 -04:00
Quentin Carbonneaux
0e89049f01 BNF Syntax becomes Notation 2016-03-11 13:24:55 -05:00
Quentin Carbonneaux
01278dbeca document constants 2016-03-11 13:22:44 -05:00
Quentin Carbonneaux
5f80243857 style 2016-03-10 16:21:44 -05:00
Quentin Carbonneaux
e616988515 move constant section higher 2016-03-10 16:16:19 -05:00
Quentin Carbonneaux
ff9990ed6f be more precise 2016-03-10 16:12:04 -05:00