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57 commits

Author SHA1 Message Date
Quentin Carbonneaux
29c5f508b9 cosmetics 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e5c68a88ce simplify parsing 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
76bf96b268 add nmem to opdesc for use in the spiller 
This new machine-independent mechanism might not be general
enough in the long term but, now, it provides a flexible way
to inform the spiller about the maximum number of arguments
of an instruction that can be spill locations.
 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9966a181c1 add some load/store operations 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e65a615c90 jez becomes jnz, complete cmp+jmp contraction 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
ad012e9d55 implement smarter compare+branch 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
7dc3e5dcf6 split cmp in two sizes 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
2482f4dbbb fix two bugs in isel 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9c7b06d68f quick fix for comparisons with constants 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
246a48ba94 start work on comparisons 
There are two things I overlooked so far.

1. Binary instructions like cmp that do not have a result
   in registers need the size suffix sometimes, for example
   when comparing a spill location with a constant.

2. The register allocator needs to be adapted to support the
   comparison instruction: it is not possible to compare two
   spill locations without using a register.
 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
df358ad6d2 use correct sizes during reg allocation 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9456200d91 use a new Ref type for registers 
This might not be a good idea, the problem was that
many spurious registers would be added to the Bits
data-structures during compilation (and would
always remain 0).  However, doing the above
modification de-uniformizes the handling of temps
and regs, this makes the code longer and not
really nicer.  Also, additional Bits structures
are required to track the registers independently.

Overall this might be a bad idea to revert.
 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
53e6393295 avoid name conflicts in enums 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
8d2d674466 start change of representation for registers 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
cf307002d9 start work on word/long handling 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
dff7044a2c replace IA with X for x64 instructions 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
0d5fb419e3 avoid keyword clash by using cons for constants 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
d8d17705c4 clean the commutativity + fix bug in emit 
The commutativity information only makes sense for
arithmetic expressions.  To account for that, I introduced
a new tri-valued boolean type B3.  Memory operations, for
example, will receive an undefined commutativity trit.

The code emitter was buggy when rega emitted instructions
like 'rax = add 1, rax', this is now fixed using the
commutativity information (we rewrite it in 'rax = add
rax, 1').
 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
92be2fdd17 start improving constants support 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
fd964388f7 add a code emitter for at&t syntax 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
854ecd4009 add crippled dce to the allocator 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
8899449c39 complete a crude register allocator 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
33fe5637c5 initiate work on reg allocation 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
b6633a13bc finish spiller, now needs testing! 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
5bd9deac8d add more printing support 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
2981a267f4 add slot addressing and some more spilling 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
49130f9edd prepare for block processing 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
4f4d4cce6f rework spilling code for jump arguments 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
5ad565e299 improve output, add debug array 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
a6168e6ed5 attempt more correct loop marking 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
0f0ee0466e rework liveness to compute reg pressure 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
73add5daae start work on spiller 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
186e68a8d3 single bit bitfield needs to be unsigned 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
bba9cf47c9 fix small type issues 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
a280eb6597 export error functions 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
e5a7482b54 rename mod to rem 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
c16532b9b0 remove useless typedefs 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
9ecfdf6334 cosmetics 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
d7548fa5d7 add rpo test and some liveness code 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
22c69707ce cosmetics 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
7e53000a1f use argument array for all instructions 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
17e48f5221 change Ref to a struct 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
065565be83 move opdesc definition 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
68c6feefbd add pretty printing function 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
a9b2d0338b change phi nodes representation 2015-09-15 23:01:27 -04:00
Quentin Carbonneaux
529920d4f4 give blocks an id 2015-09-15 23:01:27 -04:00
Quentin Carbonneaux
e4f07478ce fix naming 2015-09-15 23:01:27 -04:00
Quentin Carbonneaux
851e79f959 add rpo information to functions 2015-09-15 23:01:27 -04:00
Quentin Carbonneaux
11db0b61d9 properly clear predecessors in fillpreds 2015-09-15 23:01:27 -04:00
Quentin Carbonneaux
935ab611f0 add predecessor computation 2015-09-15 23:01:27 -04:00