prefix register macros
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parent
ec5042148e
commit
f6df9e55c5
3 changed files with 15 additions and 15 deletions
10
lisc/emit.c
10
lisc/emit.c
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@ -35,7 +35,7 @@ static char *rtoa[] = {
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[R15D] = "r15d",
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};
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enum { SSHORT, SBYTE };
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enum { SShort, SByte };
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static char *rsub[][2] = {
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[RXX] = {"OH GOD!", "OH NO!"},
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[RAX] = {"ax", "al"},
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@ -128,7 +128,7 @@ emem(Ref r, Fn *fn, FILE *f)
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econ(&fn->con[r.val], f);
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break;
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case RReg:
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assert(BASE(r.val) == r.val);
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assert(r.val < EAX);
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fprintf(f, "(");
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eref(r, fn, f);
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fprintf(f, ")");
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@ -198,7 +198,7 @@ eins(Ins i, Fn *fn, FILE *f)
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case OStoreb:
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fprintf(f, "\tmov%s ", stoa[i.op - OStore]);
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if (rtype(i.arg[0]) == RReg) {
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r = BASE(i.arg[0].val);
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r = RBASE(i.arg[0].val);
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fprintf(f, "%%%s", rsub[r][i.op - OStores]);
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} else
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eref(i.arg[0], fn, f);
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@ -213,7 +213,7 @@ eins(Ins i, Fn *fn, FILE *f)
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case OLoadsb:
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case OLoadub:
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fprintf(f, "\t%s", otoa[i.op]);
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if (BASE(i.to.val) == i.to.val)
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if (i.to.val < EAX)
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fprintf(f, "q ");
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else
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fprintf(f, "l ");
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@ -248,7 +248,7 @@ eins(Ins i, Fn *fn, FILE *f)
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eop("mov $0,", i.to, R, fn, f);
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fprintf(f, "\tset%s %%%s\n",
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ctoa[i.op-OXSet],
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rsub[BASE(i.to.val)][SBYTE]);
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rsub[RBASE(i.to.val)][SByte]);
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break;
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}
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diag("emit: unhandled instruction (3)");
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