loosen assertion in load elimination
The assertion was invalid, I was assuming il->blk was b when writing it. The new assertion should be right: If the loop level were to decrease we would get out of a cycle in cfg, this should not be possible unless we go through a block with more than 1 predecessor.
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load.c
2
load.c
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@ -260,7 +260,7 @@ def(Slice sl, bits msk, Blk *b, Ins *i, Loc *il)
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goto Load;
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if (b->npred == 1) {
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bp = b->pred[0];
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assert(bp->s2 || bp->loop == il->blk->loop);
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assert(bp->loop >= il->blk->loop);
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l = *il;
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if (bp->s2)
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l.type = LNoLoad;
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